Figure 16-2. External Clock Drive Configuration
NC
XTAL2
EXTERNAL
OSCILLATOR
SIGNAL
XTAL1
GND
Table 16-1. Status of External Pins During Idle and Power-down Modes
Program
Mode
Memory
Internal
External
Internal
External
ALE
PSEN
PORT0
Data
PORT1
Data
PORT2
Data
PORT3
Data
Idle
1
1
0
0
1
1
0
0
Idle
Float
Data
Data
Address
Data
Data
Power-down
Power-down
Data
Data
Float
Data
Data
Data
17. Program Memory Lock Bits
The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in Table 17-1.
Table 17-1. Lock Bit Protection Modes
Program Lock Bits
LB1
LB2
LB3
Protection Type
1
2
U
U
U
No program lock features
MOVC instructions executed from external program memory
are disabled from fetching code bytes from internal memory, EA
is sampled and latched on reset, and further programming of
the Flash memory is disabled
P
U
U
3
4
P
P
P
P
U
P
Same as mode 2, but verify is also disabled
Same as mode 3, but external execution is also disabled
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.
20
AT89S52
1919C–MICRO–3/05
ATMEL [ ATMEL ]
