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AT89C4051-24PU 参数 Datasheet PDF下载

AT89C4051-24PU图片预览
型号: AT89C4051-24PU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4K字节的Flash [8-bit Microcontroller with 4K Bytes Flash]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 19 页 / 328 K
品牌: ATMEL [ ATMEL CORPORATION ]
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AT89C4051
Program Verify:
If lock bits LB1 and LB2 have not been programmed code data can be read
back via the data lines for verification:
1. Reset the internal address counter to 000H by bringing RST from “L” to “H”.
2. Apply the appropriate control signals for Read Code data and read the output data at
the port P1 pins.
3. Pulse pin XTAL1 once to advance the internal address counter.
4. Read the next code data byte at the port P1 pins.
5. Repeat steps 3 and 4 until the entire array is read.
The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that
their features are enabled.
Chip Erase:
The entire PEROM array (4K bytes) and the two Lock Bits are erased electrically
by using the proper combination of control signals and by holding P3.2 low for 10 ms. The code
array is written with all “1”s in the Chip Erase operation and must be executed before any non-
blank memory byte can be re-programmed.
Reading the Signature Bytes:
The signature bytes are read by the same procedure as a nor-
mal verification of locations 000H, 001H, and 002H, except that P3.5 and P3.7 must be pulled to
a logic low. The values returned are as follows.
(000H) = 1EH indicates manufactured by Atmel
(001H) = 41H indicates AT89C4051
13. Programming Interface
Every code byte in the Flash array can be written and the entire array can be erased by using
the appropriate combination of control signals. The write operation cycle is self-timed and once
initiated, will automatically time itself to completion.
Most major worldwide programming vendors offer support for the Atmel AT89 microcontroller
series. Please contact your local programming vendor for the appropriate software revision.
13.1
Mode
Flash Programming Modes
RST/V
PP
12V
H
Bit - 1
12V
H
P3.2/PROG
P3.3
L
L
H
P3.4
H
L
H
P3.5
H
H
H
P3.7
H
H
H
Write Code Data
Read Code Data
Write Lock
Bit - 2
12V
H
H
L
L
Chip Erase
Read Signature Byte
Notes:
12V
H
H
(2)
H
L
L
L
L
L
L
L
1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at
XTAL1 pin.
2. Chip Erase requires a 10-ms PROG pulse.
3. P3.1 is pulled Low during programming to indicate RDY/BSY.
9
1001E–MICRO–6/05