Table 2-1.
Symbol
Pin Configurations (Continued)
Name and Function
Serial/8-bit Interface Control:
The DataFlash may be configured to utilize either its serial port or
8-bit port through the use of the serial/8-bit control pin (SER/BYTE). When the SER/BYTE pin is
held high, the serial port (SI and SO) of the DataFlash will be used for all data transfers, and the
8-bit port (I/O7 - I/O0) will be in a high impedance state. Any data presented on the 8-bit port
while SER/BYTE is held high will be ignored. When the SER/BYTE is held low, the 8-bit port will
be used for all data transfers, and the SO pin of the serial port will be in a high impedance state.
While SER/BYTE is low, any data presented on the SI pin will be ignored. Switching between the
serial port and 8-bit port should only be done while the CS pin is high and the device is not busy
in an internally self-timed operation.
The SER/BYTE pin is internally pulled high; therefore, if the 8-bit port is never to be used, then
connection of the SER/BYTE pin is not necessary. In addition, if the SER/BYTE pin is not
connected or if the SER/BYTE pin is always driven high externally, then the 8-bit input/output pins
(I/O7-I/O0), the VCCP pin, and the GNDP pin should be treated as “no connect”.
Device Power Supply:
The V
CC
pin is used to supply the source voltage to the device.
Operations at invalid V
CC
voltages may produce spurious results and should not be attempted.
Ground:
The ground reference for the power supply. GND should be connected to the system
ground.
8-bit Port Supply Voltage:
The VCCP pin is used to supply power for the 8-bit input/output pins
(I/O7-I/O0). The VCCP pin needs to be used if the 8-bit port is to be utilized; however, this pin
should be treated as “no connect” if the SER/BYTE pin is not connected or if the SER/BYTE pin is
always driven high externally.
8-bit Port Ground:
The GNDP pin is used to provide ground for the 8-bit input/output pins (I/O7-
I/O0). The GNDP pin needs to be used if the 8-bit port is to be utilized; however, this pin should
be treated as “no connect” if the SER/BYTE pin is not connected or if the SER/BYTE pin is
always driven high externally.
Asserted
State
Type
SER/BYTE
Low
Input
V
CC
GND
–
–
Power
Ground
V
CCP
–
Power
GNDP
–
Ground
Figure 2-1.
RDY/BUSY
RESET
WP
NC
NC
VCC
GND
NC
NC
NC
CS
SCK/CLK
SI
SO
TSOP Top View: Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
NC
I/O7
I/O6
I/O5
I/O4
VCCP
GNDP
I/O3
I/O2
I/O1
I/O0
SER/BYTE
NC
Figure 2-2.
BGA Package Ball-Out (Top View)
1
2
3
4
5
A
B
C
NC
NC
NC
NC
NC
NC
SCK
GND
VCC
NC
CS
RDY/BSY
WP
NC
D
NC
SO
SI
RESET
NC
E
NC
NC
NC
NC
NC
Figure 2-3.
CASON Top View through Package
SI
SCK
RESET
CS
1
2
3
4
8
7
6
5
SO
GND
VCC
WP
4
AT45DB642D
3542K–DFLASH–04/09
ATMEL [ ATMEL CORPORATION ]
