AT45DB642D
2. Pin Configurations and Pinouts
Table 2-1.
Symbol
Pin Configurations
Name and Function
Chip Select:
Asserting the CS pin selects the device. When the CS pin is deasserted, the device
will be deselected and normally be placed in the standby mode (not Deep Power-Down mode),
and the output pins (SO or I/O7 - I/O0) will be in a high-impedance state. When the device is
deselected, data will not be accepted on the input pins (SI or I/O7 - I/O0).
A high-to-low transition on the CS pin is required to start an operation, and a low-to-high
transition is required to end an operation. When ending an internally self-timed operation such as
a program or erase cycle, the device will not enter the standby mode until the completion of the
operation.
Serial Clock:
This pin is used to provide a clock to the device and is used to control the flow of
data to and from the device. Command, address, and input data present on the SI or I/O7 - I/O0
pins are always latched on the rising edge of SCK/CLK, while output data on the SO or I/O7 -
I/O0 pins are always clocked out on the falling edge of SCK/CLK.
Serial Input:
The SI pin is used to shift data into the device. The SI pin is used for all data input
including command and address sequences. Data on the SI pin is always latched on the rising
edge of SCK. If the SER/BYTE pin is always driven low, the SI pin should be a “no connect”.
Serial Output:
The SO pin is used to shift data out from the device. Data on the SO pin is always
clocked out on the falling edge of SCK. If the SER/BYTE pin is always driven low, the SO pin
should be a “no connect”.
8-bit Input/Output:
The I/O7-I/O0 pins are bidirectional and used to clock data into and out of the
device. The I/O7-I/O0 pins are used for all data input, including opcodes and address sequences.
The use of these pins is optional, and the pins should be treated as “no connect” if the SER/BYTE
pin is not connected or if the SER/BYTE pin is always driven high externally.
Write Protect:
When the WP pin is asserted, all sectors specified for protection by the Sector
Protection Register will be protected against program and erase operations regardless of
whether the Enable Sector Protection command has been issued or not. The WP pin functions
independently of the software controlled protection method.
If a program or erase command is issued to the device while the WP pin is asserted, the device
will simply ignore the command and perform no operation. The device will return to the idle state
once the CS pin has been deasserted. The Enable Sector Protection command and Sector
Lockdown command, however, will be recognized by the device when the WP pin is asserted.
The WP pin is internally pulled-high and may be left floating if hardware controlled protection will
not be used. However, it is recommended that the WP pin also be externally connected to V
CC
whenever possible.
Reset:
A low state on the reset pin (RESET) will terminate the operation in progress and reset
the internal state machine to an idle state. The device will remain in the reset condition as long as
a low level is present on the RESET pin. Normal operation can resume once the RESET pin is
brought back to a high level.
The device incorporates an internal power-on reset circuit, so there are no restrictions on the
RESET pin during power-on sequences. If this pin and feature are not utilized it is recommended
that the RESET pin be driven high externally.
Ready/Busy:
This open drain output pin will be driven low when the device is busy in an
internally self-timed operation. This pin, which is normally in a high state (through an external
pull-up resistor), will be pulled low during programming/erase operations, compare operations,
and page-to-buffer transfers.
The busy status indicates that the Flash memory array and one of the buffers cannot be
accessed; read and write operations to the other buffer can still be performed.
Asserted
State
Type
CS
Low
Input
SCK/CLK
–
Input
SI
–
Input
SO
–
Output
I/O7 - I/O0
–
Input/
Output
WP
Low
Input
RESET
Low
Input
RDY/BUSY
–
Output
3
3542K–DFLASH–04/09
ATMEL [ ATMEL CORPORATION ]
