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AT24C64CN-SH-T 参数 Datasheet PDF下载

AT24C64CN-SH-T图片预览
型号: AT24C64CN-SH-T
PDF下载: 下载PDF文件 查看货源
内容描述: 2线串行EEPROM 32K ( 4096 ×8 ), 64K ( 8192 ×8 ) [2-Wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8)]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 28 页 / 814 K
品牌: ATMEL [ ATMEL ]
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AT24C32C/64C  
2. Pin Description  
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM  
device and negative edge clock data out of each device.  
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain  
driven and may be wire-ORed with any number of other open-drain or open collector devices.  
DEVICE/ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are  
hard wired or left not connected for hardware compatibility with other AT24CXX devices. When  
the pins are hardwired, as many as eight 32K/64K devices may be addressed on a single bus  
system (device addressing is discussed in detail under the Device Addressing section). If the  
pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capaci-  
tive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel® recommends  
connecting the address pins to GND.  
WRITE PROTECT (WP): The write protect input, when connected to GND, allows normal write  
operations. When WP is connected high to VCC, all write operations to the memory are inhibited.  
If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive cou-  
pling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting  
the pin to GND.  
3
5298A–SEEPR–1/08