Preliminary Technical Data
AD7322
V
DD
seen by the track-and-hold amplifier looking back on the input.
For the AD7322, the value of R will include the on-resistance of
the input multiplexer. The value of R is typically 3ꢀꢀ Ω. RSOURCE
should include any extra source impedance on the Analog
input.
D
R1
C2
Vin0
C1
D
V
SS
TYPICAL CONNECTION DIAGRAM
Figure 10. Equivalent Analog Input Circuit-(Single Ended)
Figure 12 shows a typical connection diagram for the AD7322.
In this configuration the AGND pin is connected to the Analog
ground plane of the system. The DGND pin is connected to the
Digital ground plane of the system. The Analog Inputs on the
AD7322 can be configured to operate in Single Ended, True
Differential or Pseudo Differential Mode. The AD7322 can
operate with either the internal or an external reference. In
Figure 12, the AD7322 is configured to operate with the internal
2.ꢁ0 reference. A 47ꢀ nF decoupling capacitor is required when
operating with the internal reference.
V
DD
D
D
R1
C2
Vin+
C1
V
V
SS
DD
D
R1
C2
Vin-
C1
D
The 0CC pin can be connected to either a 30 or a ꢁ0 supply
voltage. The 0DD and 0SS are the dual supplies for the high
voltage analog input structures. The voltage on these pins must
be equal to or greater than the highest analog input range
selected on the analog input channels, see Table 5 for more
information. The 0DRI0E pin is connected to the supply voltage
of the microprocessor. The voltage applied to the 0DRI0E input
controls the voltage at which the serial interface operates.
V
SS
Figure 11. Equivalent Analog Input Circuit-(Differential)
Care should be taken to ensure the Analog Input never exceeds
the 0DD and 0SS supply rails by more than 3ꢀꢀ m0. This will
cause the diodes to become forward biased and start
conducting into either the 0DD or 0SS rails. These diodes can
conduct up to 1ꢀ mA without causing irreversible damage to
the part.
The Capacitor C1, in Figure 1ꢀ and Figure 11 is typically 4 pF
and can primarily be attributed to pin capacitance. The resistor
R1, is a lumped component made up of the on-resistance of the
input multiplexer and the track-and-hold switch. The Capacitor
C2, is the sampling capacitor, its capacitance will vary
depending on the Analog input range selected.
Track-and-Hold Section
The Track-and-Hold on the Analog Input of the AD7322 allows
the ADC to accurately convert an input sine wave of full scale
amplitude to 13-Bit accuracy. The input bandwidth of the
Track-and-Hold is greater than the Nyquist rate of the ADC ,
the AD7322 can handle frequencies up to 13 MHz.
The Track-and-Hold enters its tracking mode on the 1ꢁth SCLK
CS
falling edge after the
falling edge. The time required to
acquire an input signal will depend on how quickly the
sampling capacitor is charged. With zero source impedance 3ꢀꢀ
ns will be sufficient to acquire the signal to the 13-bit level.
Figure 12. Typical Connection Diagram
The acquisition time required is calculated using the following
formula:
tACQ = 1ꢀ x ((RSOURCE + R) C)
where C is the Sampling Capacitance and R is the resistance
Rev. PrE | Page 11 of 18
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