10.3.1
MCU Control Register – MCUCR
Bit
7
6
–
R
0
5
–
R
0
4
3
–
R
0
2
–
R
0
1
0
JTD
R/W
0
PUD
R/W
0
IVSEL
R/W
0
IVCE
R/W
0
MCUCR
Read/Write
Initial Value
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See “Con-
figuring the Pin” on page 74 for more details about this feature.
10.3.2
Alternate Functions of Port A
The Port A has an alternate function as the address low byte and data lines for the External
Memory Interface.
Table 10-3. Port A Pins Alternate Functions
Port Pin
PA7
Alternate Function
AD7 (External memory interface address and data bit 7)
AD6 (External memory interface address and data bit 6)
AD5 (External memory interface address and data bit 5)
AD4 (External memory interface address and data bit 4)
AD3 (External memory interface address and data bit 3)
AD2 (External memory interface address and data bit 2)
AD1 (External memory interface address and data bit 1)
AD0 (External memory interface address and data bit 0)
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Table 10-4 and Table 10-5 relates the alternate functions of Port A to the overriding signals
shown in Figure 10-5 on page 78.
Table 10-4. Overriding Signals for Alternate Functions in PA7..PA4
Signal
Name
PA7/AD7
PA6/AD6
PA5/AD5
PA4/AD4
PUOE
SRE
SRE
SRE
SRE
~(WR | ADA(1)) •
PORTA7 • PUD
~(WR | ADA) •
PORTA6 • PUD
~(WR | ADA) •
PORTA5 • PUD
~(WR | ADA) •
PORTA4 • PUD
PUOV
DDOE
DDOV
PVOE
SRE
SRE
SRE
SRE
WR | ADA
SRE
WR | ADA
SRE
WR | ADA
SRE
WR | ADA
SRE
A7 • ADA | D7
OUTPUT • WR
A6 • ADA | D6
OUTPUT • WR
A5 • ADA | D5
OUTPUT • WR
A4 • ADA | D4
OUTPUT • WR
PVOV
DIEOE
DIEOV
DI
0
0
0
0
0
0
0
0
D7 INPUT
–
D6 INPUT
–
D5 INPUT
–
D4 INPUT
–
AIO
80
AT90USB64/128
7593A–AVR–02/06
ATMEL [ ATMEL ]
