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90USB1287-16AU 参数 Datasheet PDF下载

90USB1287-16AU图片预览
型号: 90USB1287-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机具有ISP功能的Flash和USB控制器64 / 128K字节 [Microcontroller with 64/128K Bytes of ISP Flash and USB Controller]
分类和应用: 微控制器
文件页数/大小: 434 页 / 3172 K
品牌: ATMEL [ ATMEL ]
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Table 29-4. Fuse High Byte  
Fuse High Byte Bit No Description  
Default Value  
1 (unprogrammed, OCD  
disabled)  
OCDEN(4)  
7
6
Enable OCD  
Enable JTAG  
0 (programmed, JTAG  
enabled)  
JTAGEN  
Enable Serial Program and Data  
Downloading  
0 (programmed, SPI prog.  
enabled)  
SPIEN(1)  
WDTON(3)  
EESAVE  
5
4
3
Watchdog Timer always on  
1 (unprogrammed)  
EEPROM memory is preserved  
through the Chip Erase  
1 (unprogrammed,  
EEPROM not preserved)  
Select Boot Size (see Table 29-6  
for details)  
BOOTSZ1  
2
0 (programmed)(2)  
Select Boot Size (see Table 29-6  
for details)  
BOOTSZ0  
BOOTRST  
1
0
0 (programmed)(2)  
1 (unprogrammed)  
Select Reset Vector  
Note:  
1. The SPIEN Fuse is not accessible in serial programming mode.  
2. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 28-8 on page 366  
for details.  
3. See “Watchdog Timer Control Register - WDTCSR” on page 66 for details.  
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits  
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to  
be running in all sleep modes. This may increase the power consumption.  
Table 29-5. Fuse Low Byte  
Fuse Low Byte  
CKDIV8(4)  
CKOUT(3)  
SUT1  
Bit No  
Description  
Default Value  
7
6
5
4
3
2
1
0
Divide clock by 8  
Clock output  
0 (programmed)  
1 (unprogrammed)  
1 (unprogrammed)(1)  
0 (programmed)(1)  
0 (programmed)(2)  
0 (programmed)(2)  
1 (unprogrammed)(2)  
0 (programmed)(2)  
Select start-up time  
Select start-up time  
Select Clock source  
Select Clock source  
Select Clock source  
Select Clock source  
SUT0  
CKSEL3  
CKSEL2  
CKSEL1  
CKSEL0  
Note:  
1. The default value of SUT1..0 results in maximum start-up time for the default clock source.  
See Table 8-1 on page 59 for details.  
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8 MHz. See Table 6-1 on  
page 39 for details.  
3. The CKOUT Fuse allow the system clock to be output on PORTC7. See “Clock Output Buffer”  
on page 47 for details.  
4. See “System Clock Prescaler” on page 47 for details.  
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if  
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.  
370  
AT90USB64/128  
7593A–AVR–02/06  
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