AT90USB64/128
7
6
5
4
3
2
1
0
Read/Write
Initial Value
R
R
R
R
R/W
R/W
X
R/W
R/W
X
R/W
R/W
X
R/W
R/W
X
R/W
0
R/W
0
R/W
0
R/W
0
X
X
X
X
X
X
X
X
• Bits 15..12 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
5.3.3
The EEPROM Data Register – EEDR
Bit
7
6
5
4
3
2
1
0
MSB
R/W
0
LSB
R/W
0
EEDR
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
5.3.4
The EEPROM Control Register – EECR
Bit
7
6
5
4
3
2
1
0
–
–
EEPM1
R/W
X
EEPM0
R/W
X
EERIE
R/W
0
EEMPE
R/W
0
EEPE
R/W
X
EERE
R/W
0
EECR
Read/Write
Initial Value
R
0
R
0
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 5-2. While EEPE
is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00
unless the EEPROM is busy programming.
23
7593A–AVR–02/06
ATMEL [ ATMEL ]
