欢迎访问ic37.com |
会员登录 免费注册
发布采购

90USB1287-16AU 参数 Datasheet PDF下载

90USB1287-16AU图片预览
型号: 90USB1287-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机具有ISP功能的Flash和USB控制器64 / 128K字节 [Microcontroller with 64/128K Bytes of ISP Flash and USB Controller]
分类和应用: 微控制器
文件页数/大小: 434 页 / 3172 K
品牌: ATMEL [ ATMEL ]
 浏览型号90USB1287-16AU的Datasheet PDF文件第211页浏览型号90USB1287-16AU的Datasheet PDF文件第212页浏览型号90USB1287-16AU的Datasheet PDF文件第213页浏览型号90USB1287-16AU的Datasheet PDF文件第214页浏览型号90USB1287-16AU的Datasheet PDF文件第216页浏览型号90USB1287-16AU的Datasheet PDF文件第217页浏览型号90USB1287-16AU的Datasheet PDF文件第218页浏览型号90USB1287-16AU的Datasheet PDF文件第219页  
AT90USB64/128  
These bits select the mode of operation of the USART as shown in Table 19-3. See “USART  
Control and Status Register n C – UCSRnC” on page 202 for full description of the normal  
USART operation. The MSPIM is enabled when both UMSELn bits are set to one. The  
UDORDn, UCPHAn, and UCPOLn can be set in the same write operation where the MSPIM is  
enabled.  
Table 19-3. UMSELn Bits Settings  
UMSELn1  
UMSELn0  
Mode  
0
0
1
1
0
Asynchronous USART  
Synchronous USART  
(Reserved)  
1
0
1
Master SPI (MSPIM)  
• Bit 5:3 - Reserved Bits in MSPI mode  
When in MSPI mode, these bits are reserved for future use. For compatibility with future devices,  
these bits must be written to zero when UCSRnC is written.  
• Bit 2 - UDORDn: Data Order  
When set to one the LSB of the data word is transmitted first. When set to zero the MSB of the  
data word is transmitted first. Refer to the Frame Formats section page 4 for details.  
• Bit 1 - UCPHAn: Clock Phase  
The UCPHAn bit setting determine if data is sampled on the leasing edge (first) or tailing (last)  
edge of XCKn. Refer to the SPI Data Modes and Timing section page 4 for details.  
• Bit 0 - UCPOLn: Clock Polarity  
The UCPOLn bit sets the polarity of the XCKn clock. The combination of the UCPOLn and  
UCPHAn bit settings determine the timing of the data transfer. Refer to the SPI Data Modes and  
Timing section page 4 for details.  
19.6.5  
USART MSPIM Baud Rate Registers - UBRRnL and UBRRnH  
The function and bit description of the baud rate registers in MSPI mode is identical to normal  
USART operation. See “USART Baud Rate Registers – UBRRLn and UBRRHn” on page 203.  
19.7 AVR USART MSPIM vs. AVR SPI  
The USART in MSPIM mode is fully compatible with the AVR SPI regarding:  
• Master mode timing diagram.  
• The UCPOLn bit functionality is identical to the SPI CPOL bit.  
• The UCPHAn bit functionality is identical to the SPI CPHA bit.  
• The UDORDn bit functionality is identical to the SPI DORD bit.  
However, since the USART in MSPIM mode reuses the USART resources, the use of the  
USART in MSPIM mode is somewhat different compared to the SPI. In addition to differences of  
the control register bits, and that only master operation is supported by the USART in MSPIM  
mode, the following features differ between the two modules:  
• The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI has no  
buffer.  
215  
7593A–AVR–02/06  
 复制成功!