Figure 15-2. Counter Unit Block Diagram
TOVn
(Int.Req.)
DATA BUS
TOSC1
TOSC2
count
clear
T/C
Oscillator
clk Tn
TCNTn
Control Logic
Prescaler
direction
clk
bottom
top
I/O
Signal description (internal signals):
count
direction
clear
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
clkTn
Timer/Counter clock, referred to as clkT2 in the following.
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
top
bottom
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clkT2). clkT2 can be generated from an external or internal clock source,
selected by the Clock Select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clkT2 is present or not. A CPU write overrides (has priority over) all counter clear or
count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in
the Timer/Counter Control Register (TCCR2A) and the WGM22 located in the Timer/Counter
Control Register B (TCCR2B). There are close connections between how the counter behaves
(counts) and how waveforms are generated on the Output Compare outputs OC2A and OC2B.
For more details about advanced counting sequences and waveform generation, see “Modes of
Operation” on page 155.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by
the WGM22:0 bits. TOV2 can be used for generating a CPU interrupt.
15.4 Output Compare Unit
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2A and OCR2B). Whenever TCNT2 equals OCR2A or OCR2B, the comparator signals a
match. A match will set the Output Compare Flag (OCF2A or OCF2B) at the next timer clock
cycle. If the corresponding interrupt is enabled, the Output Compare Flag generates an Output
Compare interrupt. The Output Compare Flag is automatically cleared when the interrupt is exe-
cuted. Alternatively, the Output Compare Flag can be cleared by software by writing a logical
one to its I/O bit location. The Waveform Generator uses the match signal to generate an output
according to operating mode set by the WGM22:0 bits and Compare Output mode (COM2x1:0)
bits. The max and bottom signals are used by the Waveform Generator for handling the special
cases of the extreme values in some modes of operation (“Modes of Operation” on page 155).
Figure 14-10 on page 137 shows a block diagram of the Output Compare unit.
152
AT90USB64/128
7593A–AVR–02/06
ATMEL [ ATMEL ]
