Features
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AVR
®
- High Performance and Low Power RISC Architecture
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118 Powerful Instructions - Most Single Clock Cycle Execution
•
4K bytes of In-System Reprogrammable Flash
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– SPI Serial Interface for Program Downloading
– Endurance: 1,000 Write/Erase Cycles
256 bytes EEPROM
– Endurance: 100,000 Write/Erase Cycles
256 bytes Internal SRAM
32 x 8 General Purpose Working Registers
32 Programmable I/O Lines
Programmable Serial UART
SPI Serial Interface
V
CC
: 2.7 - 6.0V
Fully Static Operation
– 0 - 8 MHz, 4.0 - 6.0V
– 0 - 4 MHz, 2.7 - 4.0V
Up to 8 MIPS Throughput at 8 MHz
One 8-Bit Timer/Counter with Separate Prescaler
One 16-Bit Timer/Counter with Separate Prescaler
and Compare and Capture Modes
Dual PWM
External and Internal Interrupt Sources
Programmable Watchdog Timer with On-Chip Oscillator
On-Chip Analog Comparator
Low Power Idle and Power Down Modes
Programming Lock for Software Security
8-Bit
Microcontroller
with 4K bytes
In-System
Programmable
Flash
AT90S4414
Preliminary
Description
The AT90S4414 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock
cycle, the AT90S4414 achieves throughputs approaching 1 MIPS per MHz allowing
the system designer to optimize power consumption versus processing speed.
The AVR core is based on an enhanced RISC architecture that combines a rich
instruction set with 32 general purpose working registers. All the 32 registers are
directly connected to the Arithmetic Logic Unit (ALU), allowing two independent regis-
ters to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster
than conventional CISC microcontrollers.
(continued)
Pin Configurations
Rev. 0840DS–07/98
Note: This is a summary document. For the complete 76 page
datasheet, please visit our web site at
www.atmel.com
or e-
1
mail at
literature@atmel.com
and request literature #0840D.
ATMEL [ ATMEL CORPORATION ]
