Table 32. Baud Rate Selection Table UART
TCLK
RCLK
TBCK
RBCK
Clock Source
UART Tx
Clock Source
UART Rx
(T2CON)
(T2CON)
(BDRCON)
(BDRCON)
0
1
0
1
X
X
0
1
X
0
0
1
1
0
1
X
X
X
0
0
0
0
1
1
0
0
1
0
0
0
0
0
0
1
1
1
Timer 1
Timer 2
Timer 1
Timer 1
Timer 1
Timer 2
Timer 2
Timer 2
INT_BRG
INT_BRG
Timer 1
Timer 1
Timer 2
INT_BRG
INT_BRG
INT_BRG
Timer 2
INT_BRG
Internal Baud Rate Generator When the internal Baud Rate Generator is used, the Baud Rates are determined by the
(BRG)
BRG overflow depending on the BRL reload value, the value of SPD bit (Speed Mode)
in BDRCON register and the value of the SMOD1 bit in PCON register.
Figure 21. Internal Baud Rate
FClk Periph
÷ 6
0
1
Overflow
BRG
(8 bits)
÷ 2
0
1
INT_BRG
SPD
BDRCON.1
BRR
BDRCON.4
SMOD1
PCON.7
BRL
(8 bits)
•
The baud rate for UART is token by formula:
2SMOD1 ⋅ FPER
6(1-SPD) ⋅ 32 ⋅ (256 -BRL)
Baud_Rate =
2SMOD1 ⋅ FPER
6(1-SPD) ⋅ 32 ⋅ Baud_Rate
BRL = 256 -
48
AT89C51RB2/RC2
4180E–8051–10/06