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89C51RC2-UL 参数 Datasheet PDF下载

89C51RC2-UL图片预览
型号: 89C51RC2-UL
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有16K / 32K字节的闪存 [8-bit Microcontroller with 16K/ 32K Bytes Flash]
分类和应用: 闪存微控制器
文件页数/大小: 127 页 / 1478 K
品牌: ATMEL [ ATMEL ]
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The SADEN byte is selected so that each slave may be addressed separately.  
For slave A, bit 0 (the LSB) is a don’t-care bit; for slaves B and C, bit 0 is a 1.To commu-  
nicate with slave A only, the master must send an address where bit 0 is clear (e. g.  
1111 0000b).  
For slave A, bit 1 is a 1; for slaves B and C, bit 1 is a don’t care bit. To communicate with  
slaves B and C, but not slave A, the master must send an address with bits 0 and 1 both  
set (e. g. 1111 0011b).  
To communicate with slaves A, B and C, the master must send an address with bit 0 set,  
bit 1 clear, and bit 2 clear (e. g. 1111 0001b).  
Broadcast Address  
A broadcast address is formed from the logical OR of the SADDR and SADEN registers  
with zeros defined as don’t-care bits, e. g. :  
SADDR0101 0110b  
SADEN1111 1100b  
Broadcast =SADDR OR SADEN1111 111Xb  
The use of don’t-care bits provides flexibility in defining the broadcast address, however  
in most applications, a broadcast address is FFh. The following is an example of using  
broadcast addresses:  
Slave A:SADDR1111 0001b  
SADEN1111 1010b  
Broadcast1111 1X11b,  
Slave B:SADDR1111 0011b  
SADEN1111 1001b  
Broadcast1111 1X11B,  
Slave C:SADDR=1111 0011b  
SADEN1111 1101b  
Broadcast1111 1111b  
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with  
all of the slaves, the master must send an address FFh. To communicate with slaves A  
and B, but not slave C, the master can send and address FBh.  
Reset Addresses  
On reset, the SADDR and SADEN registers are initialized to 00h, i. e. the given and  
broadcast addresses are XXXX XXXXb(all don’t-care bits). This ensures that the serial  
port will reply to any address, and so, that it is backwards compatible with the 80C51  
microcontrollers that do not support automatic address recognition.  
46  
AT89C51RB2/RC2  
4180E–8051–10/06  
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