Table 21. T2MOD Register
T2MOD – Timer 2 Mode Control Register (C9h)
7
-
6
-
5
-
4
-
3
-
2
-
1
0
T2OE
DCEN
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
2
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
-
-
-
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 2 Output Enable Bitt
1
0
T2OE
DCEN
Cleared to program P1.0/T2 as clock input or I/O port.
Set to program P1.0/T2 as clock output.
Down Counter Enable Bit
Cleared to disable Timer 2 as up/down counter.
Set to enable Timer 2 as up/down counter.
Reset Value = XXXX XX00b
Not bit addressable
30
AT89C51RB2/RC2
4180E–8051–10/06
ATMEL [ ATMEL ]
