欢迎访问ic37.com |
会员登录 免费注册
发布采购

85C51SND3BX02 参数 Datasheet PDF下载

85C51SND3BX02图片预览
型号: 85C51SND3BX02
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
 浏览型号85C51SND3BX02的Datasheet PDF文件第173页浏览型号85C51SND3BX02的Datasheet PDF文件第174页浏览型号85C51SND3BX02的Datasheet PDF文件第175页浏览型号85C51SND3BX02的Datasheet PDF文件第176页浏览型号85C51SND3BX02的Datasheet PDF文件第178页浏览型号85C51SND3BX02的Datasheet PDF文件第179页浏览型号85C51SND3BX02的Datasheet PDF文件第180页浏览型号85C51SND3BX02的Datasheet PDF文件第181页  
AT85C51SND3Bx  
Table 195. Spare Zone Content  
Offset  
Description  
0-1  
2
User Data Area. Shall be managed by software.  
ECC Valid. Managed by NFC.  
3
User Data Byte. Managed by NFC through NFUDAT register.  
Data Status Flag. Shall be managed by software.  
Block Status Flag. Shall be managed by software.  
4
5
Logical Block Address. Managed by NFC through NFLOG register (see Section “Logical  
Block Address”).  
6-7  
8-10  
ECC Area-2. Managed by NFC.  
Logical Block Address. Managed by NFC through NFLOG register (see Section “Logical  
Block Address”).  
11-12  
13-15  
ECC Area-1. Managed by NFC.  
The bytes which are not managed by the NFC are written to FFh.  
The spare zone is processed after the ‘data zone’.  
Write Session  
The NFC will initialize the byte at offset 3 with the byte contained in the NFUDAT regis-  
ter, and the ‘Logical Block Address’ (offsets 6-7, also duplicated at offsets 11-12) with  
the 2-bytes-descriptor stored in NFLOG (see Table 197, page 179 for more details).  
Then the ECC is written at position 13, 14 and 15 for the ECC group 1 (from data byte 0  
to data byte 255), and at position 8, 9 and 10 for ECC group 2 (from data byte 256 to  
data byte 511).  
The ECC used can detects 2 wrong bits or more, and correct one bit.  
Read Session  
The NFC does only check (depending configuration explained in the next chapter) the  
ECC (ECC-1 and ECC-2).  
Spare Zone Management  
The way the spare zone is handled depends on 3 bits: the SPZEN bit in NFCON which  
is the automatic management enable bit, the ECCEN which is the ECC management  
enable bit and the ECCRDYE bit which is the ECC ready interrupt enable bit. Table 196  
summarizes the spare zone behavior according to those control bits. Following section  
give detail on the management modes.  
Table 196. Spare Zone Management Modes  
SPZEN  
ECCEN  
ECCRDYE Description  
Spare Zone Management Mode 1  
0
0
X
0
The spare zone is not managed by the NFC.  
Spare Zone Management Mode 2  
1
1
1
The spare zone is entirely managed by the NFC.  
Spare Zone Management Mode 3  
The spare zone is not automatically managed by the NFC. However,  
an interrupt is triggered when the ECC FIFO is full, so after each 512  
bytes processed. The user must program/verify the spare zone.  
X
1
177  
7632A–MP3–03/06  
 复制成功!