Figure 36. Timer/Counter x (x = 0 or 1) in Mode 2
TIMx
CLOCK
Timer x
Interrupt
Request
÷ 6
0
1
Overflow
TLx
(8 bits)
TFx
TCON reg
Tx
C/Tx#
TMOD Reg
INTx
GATEx
TMOD Reg
THx
(8 bits)
TRx
TCON Reg
Figure 37. Mode 2 Auto-reload Period Formula
6 ⋅ (256 – THx)
TFxPER
=
FTIMx
Mode 3 (2 x 8-bit Timers)
Mode 3 configures Timer 0 such that registers TL0 and TH0 operate as separate 8-bit
Timers (see Figure 38). This mode is provided for applications requiring an additional 8-
bit Timer or Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in TMOD reg-
ister, and TR0 and TF0 in TCON register in the normal manner. TH0 is locked into a
Timer function (counting FTF1/6) and takes over use of the Timer 1 interrupt (TF1) and
run control (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode
3. Figure 39 gives the auto-reload period calculation formulas for both TF0 and TF1
flags.
Figure 38. Timer/Counter 0 in Mode 3: 2 8-bit Counters
TIM0
CLOCK
Timer 0
Interrupt
Request
÷ 6
0
1
Overflow
TL0
(8 bits)
TF0
TCON.5
Tx
C/T0#
TMOD.2
INTx
GATE0
TMOD.3
TR0
TCON.4
Timer 1
Interrupt
Request
Overflow
TIM0
CLOCK
TH0
(8 bits)
÷ 6
TF1
TCON.7
TR1
TCON.6
Figure 39. Mode 3 Overflow Period Formula
6 ⋅ (256 – TH0)
6 ⋅ (256 – TL0)
TF1PER
=
TF0PER
=
FTIM0
FTIM0
68
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
