the clocks to the CPU and peripherals. Using INTn input, execution resumes
when the input is released (see Figure 10) while using KINx input, execution
resumes after counting 1024 clock ensuring the oscillator is restarted properly
(see Figure 11). This behavior is necessary for decoding the key while it is still
pressed. In both cases, execution resumes with the interrupt service routine.
Upon completion of the interrupt service routine, program execution resumes
with the instruction immediately following the instruction that activated Power-
down mode.
Note:
1. The external interrupt used to exit Power-down mode must be configured as level
sensitive (INT0 and INT1) and must be assigned the highest priority. In addition, the
duration of the interrupt must be long enough to allow the oscillator to stabilize. The
execution will only resume when the interrupt is de-asserted.
2. Exit from power-down by external interrupt does not affect the SFRs nor the internal
RAM content.
Figure 10. Power-down Exit Waveform Using INT1:0
INT1:0
OSC
Active Phase
Power-down Phase
Oscillator Restart Phase
Active Phase
Figure 11. Power-down Exit Waveform Using KIN3:0
KIN3:0(1)
OSC
Active Phase
Power-down Phase
42000 clock count
Active Phase
Note:
1. KIN3:0 can be high or low-level triggered.
2. Generate a reset.
–
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU and
peripherals. Program execution momentarily resumes with the instruction
immediately following the instruction that activated Power-down mode and may
continue for a number of clock cycles before the internal reset algorithm takes
control. Reset initializes the AT85C51SND3B and vectors the CPU to address
0000h.
Notes: 1. During the time that execution resumes, the internal RAM cannot be accessed; how-
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal
RAM content.
22
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
