Table 62. SFR Page 3: Addresses and Reset Values
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
SCHGPR3
0000 0000
SCHGPR2
0000 0000
SCHGPR1
0000 0000
SCHGPR0
0000 0000
F8h
F0h
E8h
E0h
D8h
D0h
C8h
C0h
B8h
B0h
A8h
A0h
98h
90h
88h
80h
FFh
F7h
EFh
E7h
DFh
D7h
CFh
C7h
BFh
B7h
AFh
A7h
9Fh
97h
8Fh
87h
B(1)
0000 0000
ACC(1)
0000 0000
PSW(1)
0000 0000
PPCON(1)
0000 0001
P3(1)
1111 1111
P2(1)
1111 1111
P1(1)
1111 1111
SVERS(2)
XXXX XXXX
P0(1)
1111 1111
SP
0000 0111
DPL
0000 0000
DPH
0000 0000
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
Notes: 1. SFR registers with least significant nibble address equal to 0 or 8 are bit-addressable.
2. SVERS reset value depends on the silicon version 1111 1011 for AT85C51SND3B product.
48
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
