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85C51SND3B1 参数 Datasheet PDF下载

85C51SND3B1图片预览
型号: 85C51SND3B1
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
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AT85C51SND3Bx  
Timer 0 Enhanced Mode  
Timer 0 overflow period can be increased in all modes by enabling a divider as detailed  
in Figure 40. This mode is implemented to allow higher time periods as it can be used  
for example as a scheduler time base with auto-reload (mode 2).  
Timer 0 enhanced mode is enabled by programming T0ETB2:0 bits in SCHCLK (see  
Table 87) to a value other than 000b and according to Table 79.  
Figure 40. Timer/Counter 0 Enhanced Mode  
Timer 0  
Interrupt  
Request  
÷ 2N  
Timer 0 Overflow  
TF0  
TCON.5  
T0ETB2:0  
SCHCLK.6:4  
Table 79. Timer/counter 0 Enhanced Overflow Period  
T0ETB2  
T0ETB1  
T0ETB0  
New TF0 Overflow Period  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
TF0PER ÷ 1 (divider disable)  
TF0PER ÷ 2  
TF0PER ÷ 4  
TF0PER ÷ 8  
TF0PER ÷ 16  
TF0PER ÷ 32  
TF0PER ÷ 64  
TF0PER ÷ 128  
Timer 1  
Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode and for the  
enhanced mode which is not available. The following comments help to understand the  
differences:  
Timer 1 functions as either a Timer or event Counter in three modes of operation.  
Figure 32, Figure 34, and Figure 36 show the logical configuration for modes 0, 1,  
and 2. Timer 1’s mode 3 is a hold-count mode.  
Timer 1 is controlled by the four high-order bits of TMOD register (see Table 82) and  
bits 2, 3, 6 and 7 of TCON register (see Table 81). TMOD register selects the  
method of Timer gating (GATE1), Timer or Counter operation (C/T1#) and mode of  
operation (M11 and M01) according to Table 80. TCON register provides Timer 1  
control functions: overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and  
interrupt type control bit (IT1).  
Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best  
suited for this purpose.  
For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented  
by the selected input. Setting GATE1 and TR1 allows external pin INT1 to control  
Timer operation.  
Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating  
an interrupt request.  
When Timer 0 is in mode 3, it uses Timer 1’s overflow flag (TF1) and run control bit  
(TR1). For this situation, use Timer 1 only for applications that do not require an  
interrupt (such as a Baud Rate Generator for the Serial Port) and switch Timer 1 in  
and out of mode 3 to turn it off and on.  
69  
7632A–MP3–03/06  
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