AT85C51SND3Bx
Figure 32. Timer/Counter x (x = 0 or 1) in Mode 0
TIMx
CLOCK
Timer x
Interrupt
Request
÷ 6
0
1
Overflow
THx
TLx
TFx
TCON Reg
(8 bits) (5 bits)
Tx
C/Tx#
TMOD Reg
INTx
GATEx
TMOD Reg
TRx
TCON Reg
Figure 33. Mode 0 Overflow Period Formula
6 ⋅ (16384 – (THx, TLx))
TFxPER
=
FTIMx
Mode 1 (16-bit Timer)
Mode 1 configures Timer 0 as a 16-bit Timer with TH0 and TL0 registers connected in
cascade (see Figure 34). The selected input increments TL0 register. Figure 35 gives
the overflow period calculation formula when in timer mode.
Figure 34. Timer/Counter x (x = 0 or 1) in Mode 1
TIMx
CLOCK
Timer x
Interrupt
Request
÷ 6
0
1
Overflow
THx
TLx
TFx
TCON Reg
(8 bits) (8 bits)
Tx
C/Tx#
TMOD Reg
INTx
GATEx
TMOD Reg
TRx
TCON Reg
Figure 35. Mode 1 Overflow Period Formula
6 ⋅ (65536 – (THx, TLx))
TFxPER
=
FTIMx
Mode 2 (8-bit Timer with Auto- Mode 2 configures Timer 0 as an 8-bit Timer (TL0 register) that automatically reloads
Reload)
from TH0 register (see Figure 36). TL0 overflow sets TF0 flag in TCON register and
reloads TL0 with the contents of TH0, which is preset by software. When the interrupt
request is serviced, hardware clears TF0. The reload leaves TH0 unchanged. The next
reload value may be changed at any time by writing it to TH0 register. Figure 37 gives
the auto-reload period calculation formula when in timer mode.
67
7632A–MP3–03/06
ATMEL [ ATMEL ]
