AT8xC51SND2C
MP3 Data
The MP3 decoder does not start any frame decoding before having a complete frame in
its input buffer(1). In order to manage the load of MP3 data in the frame buffer, a hard-
ware handshake consisting of data request and data acknowledgment is implemented.
Each time the MP3 decoder needs MP3 data, it sets the MPREQ, MPFREQ and
MPBREQ flags respectively in MP3STA and MP3STA1 registers. MPREQ flag can gen-
erate an interrupt if enabled as explained in Section “Interrupt”. The CPU must then load
data in the buffer by writing it through MP3DAT register thus acknowledging the previ-
ous request. As shown in Figure 41, the MPFREQ flag remains set while data (i.e a
frame) is requested by the decoder. It is cleared when no more data is requested and
set again when new data are requested. MPBREQ flag toggles at every Byte writing.
Note:
1. The first request after enable, consists in 1024 Bytes of data to fill in the input buffer.
Figure 41. Data Timing Diagram
Cleared when Reading MP3STA
MPREQ Flag
MPFREQ Flag
MPBREQ Flag
Write to MP3DAT
MP3 Clock
The MP3 decoder clock is generated by division of the PLL clock. The division factor is
given by MPCD4:0 bits in MP3CLK register. Figure 42 shows the MP3 decoder clock
generator and its calculation formula. The MP3 decoder clock frequency depends only
on the incoming MP3 frames.
Figure 42. MP3 Clock Generator and Symbol
MP3CLK
PLL
CLOCK
MP3
CLOCK
MPCD4:0
MP3 Decoder Clock
MP3 Clock Symbol
PLLclk
MPCD + 1
MP3clk = ----------------------------
As soon as the frame header has been decoded and the MPEG version extracted, the
minimum MP3 input frequency must be programmed according to Table 70.
Table 70. MP3 Clock Frequency
MPEG Version
Minimum MP3 Clock (MHz)
I
21
II
10.5
63
4341D–MP3–04/05
ATMEL [ ATMEL ]
