Table 65. TL0 Register
TL0 (S:8Ah) – Timer 0 Low Byte Register
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
-
Bit
Bit
Number
Mnemonic Description
7:0
Low Byte of Timer 0
Reset Value = 0000 0000b
Table 66. TH1 Register
TH1 (S:8Dh) – Timer 1 High Byte Register
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
-
Bit
Bit
Number
Mnemonic Description
7:0
High Byte of Timer 1
Reset Value = 0000 0000b
Table 67. TL1 Register
TL1 (S:8Bh) – Timer 1 Low Byte Register
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
-
Bit
Bit
Number
Mnemonic Description
7:0
Low Byte of Timer 1
Reset Value = 0000 0000b
58
AT8xC51SND2C
4341D–MP3–04/05