TS68EN360
7.13 PIP/PIO Electrical Specifications
Table 7-12. GND = 0 VDC, TC = -55 to +125°C.The electrical specifications in this document are preliminary
(See Figure 7-37 to Figure 7-41)
25.0 MHz
33.34 MHz
Number Characteristic
Min
Max
Min
Max
Unit
ns
21
22
23
Data-In Setup Time to STBI Low
0
–
–
–
0
–
–
–
Data-In Hold Time to STBI High
STBI Pulse Width
2.5 – t3
1.5
2.5 – t3
1.5
clk
clk
1 CLKO1 –
5 ns
1 CLKO1 –
5 ns
24
STBO Pulse Width
–
–
–v
25
26
27
28
29
30
Data-Out Setup Time to STBO Low
Data-Out Hold Time from STBO High
STBI Low to STBO Low (Rx Interlock)
STBI Low to STBO High (Tx Interlock)
Data-In Setup Time to Clock Low
Data-In Hold Time from Clock Low
2
5
–
–
2
–
–
–
2
5
–
–
2
–
–
–
clk
clk
clk
clk
ns
–
–
2
2
20
10
15
7.5
ns
Clock High to Data-Out Valid (CPU Writes Data,
Control, or Direction)
–
25
–
25
ns
Note:
1. t3 = spec. 3 on Table 7-4.
Figure 7-37. PIP Rx (Interlock Mode)
26
25
DATA OUT
STRBO
(OUTPUT)
28
23
STRBI
(INPUT)
51
2113B–HIREL–06/05
ATMEL [ ATMEL ]
