欢迎访问ic37.com |
会员登录 免费注册
发布采购

5962-9317710VTC 参数 Datasheet PDF下载

5962-9317710VTC图片预览
型号: 5962-9317710VTC
PDF下载: 下载PDF文件 查看货源
内容描述: 弧度。宽容高速16 KB ×9并行FIFO ,具有可编程标志 [Rad. Tolerant High Speed 16 Kb x 9 Parallel FIFO with Programmable Flag]
分类和应用: 存储先进先出芯片
文件页数/大小: 20 页 / 2117 K
品牌: ATMEL [ ATMEL CORPORATION ]
 浏览型号5962-9317710VTC的Datasheet PDF文件第1页浏览型号5962-9317710VTC的Datasheet PDF文件第2页浏览型号5962-9317710VTC的Datasheet PDF文件第3页浏览型号5962-9317710VTC的Datasheet PDF文件第4页浏览型号5962-9317710VTC的Datasheet PDF文件第6页浏览型号5962-9317710VTC的Datasheet PDF文件第7页浏览型号5962-9317710VTC的Datasheet PDF文件第8页浏览型号5962-9317710VTC的Datasheet PDF文件第9页  
M672061H
Expansion In (XI)
This input is a dual-purpose pin. Expansion In (XI) is connected to GND to indicate an
operation in the single device mode. Expansion In (XI) is connected to Expansion Out
(XO) of the previous device in the Depth Expansion or Daisy Chain modes.
The Full Flag (FF) will go low, inhibiting further write operations when the write pointer is
one location less than the read pointer, indicating that the device is full. If the read
pointer is not moved after Reset (RS), the Full Flag (FF) will go low after 16384 writes.
The Empty Flag (EF) will go low, inhibiting further read operations when the read pointer
is equal to the write pointer, indicating that the device is empty.
This is a dual-purpose output. In the single device mode, when Expansion In (XI) is con-
nected to ground, this output acts as an indication of a half-full memory.
The M672061H offers a variable offset for the Half Full condition. The offset is loaded
into a register during a reset cycle. When RS is low, the Programmable Half Full Flag
(PHF) can be loaded from the DATA inputs I
0
- I
8
by pulsing W low or from the DATA
outputs Q
0
- Q
8
by pulsing R low. The offset options are listed in table 1. If PHF is not
loaded during the reset cycle, the default offset will be the half of the total memory of the
device.
The Programmable Half-Full Flag (PHF) will be set to low and will remain set until the
difference between the write and read pointers is less than or equal to the Programma-
ble offset (if the Half Full Flag register has been loaded during the reset cycle) or the half
of the total memory (if the Half Full register has not been loaded during the reset cycle).
After half the memory is filled and on the falling edge of the next write operation, the
Half-Full Flag (HF) will be set to low and will remain set until the difference between the
write and read pointers is less than or equal to half of the total memory of the device.
The Half-Full Flag (HF) is then reset by the rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (XI) is connected to Expansion Out (XO) of
the previous device. This output acts as a signal to the next device in the Daisy Chain by
providing a pulse to the next device when the previous device reaches the last memory
location.
Full Flag (FF)
Empty Flag (EF)
Expansion Out/Half-full
Flag (XO/HF)
Data Output (Q
0
- Q
8
)
DATA output for 9-bit wide data. This data is in a high impedance condition whenever
Read (R) is in a high state.
5
4144K-AERO-04/07