4.4
FIFO interface
The FIFO (8-bit or 16-bit data width) interface provides the control signals full, write,
empty and read, depending on the direction of the data flow (receive/transmit).
Data received from the FIFO interface is sent over the SpaceWire link grouped in pack-
ets. The length of a packet (in bytes) can be specified either by setting an internal
counter or by external signals. This interface can be programmed to use 0 to 7 wait
states.
The FIFO interface handles two operating modes:
• An active mode where the AT7912F FIFO controller reads and writes from/to an
external FIFO
• A passive mode where an external controller reads and writes from/to the AT7912F
internal FIFO.
4.5
GPIO Interface
The general purpose I/O (GPIO Interface) provides up to 24 bidirectional signal lines.
The direction (input or output) of each GPIO line can be set individually via register.
Data to/from the GPIO lines is written / read via the GPIO data register. The GPIO pro-
vides 8 dedicated I/O lines, the remaining 16 lines of the port are shared with the ADC
address and host data bus. These GPIO lines are available when the corresponding unit
(e.g. the host data bus) of the AT7912F is not being used (disabled).
4.6
UART interface
Two independent UARTs are included in the AT7912F as well. One UART uses dedi-
cated I/O lines whereas the second UART is sharing its pins with the GPIO port. The
transmit rate of the UARTs in bps can be programmed via a 12-bit wide register with a
maximum bit rate of about 780 kbit/s.
Each UART has a 4-byte FIFO in transmit, and a 4-byte FIFO in receive direction.
The UARTs can optionally use hardware handshake (rts/cts).
4.7
Timers / Event Counter
Two 32-bit on-chip timers are available on the AT7912F.
Each timer provides a 32-bit counter and a 32-bit reload register. The two timers can be
operated independently or cascaded.
The timers can be used to set an external signal when the timeout value is reached.
Each timer can generate periodic interrupts or only one interrupt, depending on configu-
ration. An external output, TMR_EXP, signals to other devices that the timer count has
expired. An external input, TMR_CLK, is provided which can be used as trigger source
for the timer.
10
7829A–AERO–10/08
ATMEL [ ATMEL ]
