5V 0.5V
max. output
current [mA]
3.3V 0.3V
max. output
current [mA]
Signal Name(1)(3) Type(2)(4)
Function
load [pF]
25
LSO1
LDI2
O
I
Link Strobe Output channel 1
12
6
Link Data Input channel 2
LSI2
I
Link Strobe Input channel 2
Link Data Output channel 2
Link Strobe Output channel 2
Link Data Input channel 3
LDO2
LSO2
LDI3
O
O
I
12
12
6
6
25
25
LSI3
I
Link Strobe Input channel 3
Link Data Output channel 3
Link Strobe Output channel 3
Test Reset. Resets the test state machine.
LDO3
LSO3
TRST*
O
O
I
12
12
6
6
25
25
Test Clock. Provides an asynchronous clock for JTAG
boundary scan.
TCK
TMS
TDI
I
I
I
Test Mode Select. Used to control the test state machine.
Test Data Input. Provides serial data for the boundary scan
logic.
Test Data Output. Serial scan output of the boundary scan
path.
TDO
O
I
3
1.5
50
Reset. Sets the AT7911E to a known state. This input must
be asserted (low) at power-up. The minimum width of
RESET low is 5 cycles of CLK10 in parallel with CLK
running.
RESET*
External clock input to AT7911E (max. 25 MHz).
Must be derived from RAM access time.
CLK
I
I
External clock input to AT7911E DS-links (application
specific, nominal 10 MHz). Used to generate to transmission
speed and link disconnect timeout.
CLK10
TIME_CODE_SY
NC
A falling edge on this signal sends (if enabled) the internal
SpaceWire time code value over the links
I
Output of internal PLL. Used to connect a network of
external RC devices. This is not a PLL clock output.
PLLOUT
O
PLL Control signal - Configure PLL for 3.3V or 5V operation
VCC = 5 Volt: connect this signal with GND
VCC_3VOLT
I
VCC = 3.3 Volt: connect this signal with VCC
VCC
GND
Power Supply
Ground
Notes: 1. Groups of pins represent busses where the highest number is the MSB.
2. O = Output; I = Input; Z = High Impedance
3. (*) = active low signal
4. O/Z = if using a configuration with two AT7911Es these signals can directly be connected
together (WIROR)
6
AT7911E
7737B–AERO–05/08
ATMEL [ ATMEL ]
