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5962-0324601QXC 参数 Datasheet PDF下载

5962-0324601QXC图片预览
型号: 5962-0324601QXC
PDF下载: 下载PDF文件 查看货源
内容描述: 低压抗辐射的32位SPARC嵌入式处理器 [Low-Voltage Rad-Hard 32-bit SPARC Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器异步传输模式ATM时钟
文件页数/大小: 42 页 / 3365 K
品牌: ATMEL [ ATMEL ]
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TSC695FL  
Test and Diagnostic  
Hardware Functions  
A variety of TSC695FL test and diagnostic hardware functions, including boundary  
scan, internal scan, clock control and On-chip Debugger, are controlled through an  
IEEE 1149.1 (JTAG) standard Test Access Port (TAP).  
Test Access Port  
The TAP interfaces to the JTAG bus via 5 dedicated pins on the TSC695FL chip. These  
pins are:  
TCK (input): Test Clock  
TMS (input): Test Mode Select  
TDI (input): Test Data Input  
TDO (output): Test Data Output  
TRST (input): Test Reset  
Instruction Register  
Five standard instructions are supported by the TSC695FL TAP.  
Binary Value Name of Instruction Data Register  
Scan Chain Accessed  
Boundary Scan  
00. 0000  
00. 0001  
EXTEST  
Register  
Boundary scan chain  
Boundary scan chain  
Boundary Scan  
Register  
SAMPLE/PRELOAD  
Boundary Scan  
Register  
00. 0011  
11. 1111  
10. 0000  
INTEST  
BYPASS  
IDCODE  
Boundary scan chain  
Bypass register  
Bypass Register  
Device ID Register  
ID register scan chain  
Debugging  
The design is highly testable with the support of an On-Chip Debugger (OCD), an inter-  
nal and boundary scan through JTAG interface.  
13  
4204C–AERO–05/05