Figure 14. Clock Waveforms
STATE1
P1P2
STATE2
P1P2
STATE3
P1P2
STATE4
P1P2
STATE4
STATE5
P1P2
STATE6
P1P2
STATE5
P1P2
INTERNAL
CLOCK
P1P2
XTAL2
ALE
THESE SIGNALS ARE NOT ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
EXTERNAL PROGRAM MEMORY FETCH
PSEN
PCL OUT
PCL OUT
PCL OUT
DATA
P0
DATA
SAMPLED
FLOAT
DATA
SAMPLED
FLOAT
SAMPLED
FLOAT
INDICATES ADDRESS
P2 (EXT)
TRANSITIONS
READ CYCLE
RD
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
P0
P2
DPL OR Rt OUT
FLOAT
INDICATES DPH OR P2 SFR TO PCH TRANSITION
WRITE CYCLE
WR
PCL OUT (EVEN IF
MEMORY IS INTERNAL)
P0
DPL OR Rt OUT
DATA OUT
INDICATES DPH OR P2 SFR TO PCH TRANSITION
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
P2
PORT OPERATION
OLD DATA
P0 PINS SAMPLED
NEW DATA
P0 PINS SAMPLED
MOV DEST P0
P1, P2, P3 PINS SAMPLED
RXD SAMPLED
P1, P2, P3 PINS SAMPLED
MOV DEST PORT (P1, P2,
(INCLUDES INT0, INT1, TO, T1)
RXD SAMPLED
SERIAL PORT SHIFT CLOCK
TXD (MODE 0)
This diagram indicates when signals are clocked internally. The time it takes the signals to propagate to the pins, however,
ranges from 25 to 125 ns. This propagation delay is dependent on variables such as temperature and pin loading. Propaga-
tion also varies from output to output and component. Typically though (TA=25°C fully loaded) RD and WR propagation
delays are approximately 50 ns. The other signals are typically 85 ns. Propagation delays are incorporated in the AC
specifications.
16
80C32E
4149N–AERO–04/07
ATMEL [ ATMEL ]
