CS5480
2. PIN DESCRIPTION
24
23
22
21
20
19
1
2
3
4
5
6
18
17
16
15
14
13
XIN
RESET
IIN1-
SCLK
RX/SDI
TX/SDO
DO3
Thermal Pad
IIN1+
VIN+
DO2
Top-Down (Through Package) View
24-Pin QFN Package
VIN-
DO1
7
8
9
11
12
10
Clock Generator
Crystal In
1,24
XIN, XOUT — Connect to an external quartz crystal. Alternatively, an external clock can be
supplied to the XIN pin to provide the system clock for the device.
Crystal Out
Digital Pins and Serial Data I/O
Digital Outputs
13,14,15
DO1, DO2, DO3 — Configurable digital outputs for energy pulses, interrupt, tamper indication,
energy direction, and zero-crossings.
Reset
2
16,17
18
RESET — An active-low Schmitt-trigger input used to reset the chip.
TX/SDO, RX/SDI — UART/SPI serial data output/input.
SCLK — Serial clock for the SPI.
Serial Data I/O
Serial Clock Input
Serial Mode Select
20
SSEL — Selects the type of the serial interface, UART or SPI™. Logic level one - UART
selected. Logic level zero - SPI selected.
Chip Select
19
21
CS — Chip select for the UART/SPI.
Operating Mode Select
Analog Inputs/Outputs
Voltage Input
MODE — Connect to VDDA for proper operation.
5,6
4,3,8,7
10,9
VIN+, VIN- — Differential analog input for the voltage channel.
Current Inputs
IIN1+, IIN1-, IIN2+, IIN2- — Differential analog inputs for the current channels.
Voltage Reference
VREF+, VREF- — The internal voltage reference. A 0.1 µF bypass capacitor is required
between these two pins.
Power Supply Connections
Internal Digital Supply
23
VDDD — Decoupling pin for the internal 1.8V digital supply. A 0.1µF bypass capacitor is
required between this pin and GNDD.
Digital Ground
22
12
11
-
GNDD — Digital ground.
Positive Analog Supply
Analog Ground
Thermal Pad
VDDA — The positive 3.3V analog supply.
GNDA — Analog ground.
No Electrical Connection.
6
DS980F2
APEX [ CIRRUS LOGIC ]
