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CS1615-FSZR 参数 Datasheet PDF下载

CS1615-FSZR图片预览
型号: CS1615-FSZR
PDF下载: 下载PDF文件 查看货源
内容描述: 单级可调光离线式AC / DC控制器,用于LED照明 [Single Stage Dimmable Offline AC/DC Controller for LED Lamps]
分类和应用: 控制器
文件页数/大小: 16 页 / 387 K
品牌: APEX [ CIRRUS LOGIC ]
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CS1615/16
dimmer switch on the falling edge of the input voltage using a
source-controlled dimmer-compatibility circuit.
5.4.1
Clamp Overpower Protection
The CS1615/16 clamp overpower protection (COP) control logic
averages the turn-on time of the clamp circuit. If the output of the
averaging logic exceeds 10%, a COP event is actuated. The
clamp circuit is disabled as well as the flyback/buck-boost
controller and the dimmer-compatibility circuit. The COP fault
state is not cleared until the power to the IC is recycled.
5.5 Dimmer Angle Extraction and the Dim
Mapping Algorithm
When operating with a dimmer, the dimming signal is extracted
in the time domain and is proportional to the conduction angle of
the dimmer. A control variable is passed to the quasi-resonant
flyback/buck-boost controller to achieve a wide range of output
currents.
Figure 11. Trailing-edge Mode Phase-cut Waveform
5.3.2
Switch Overpower Protection
5.6 Dual-mode Flyback/Buck-boost
The CS1615/16 is configurable for isolated or non-isolated
topologies using a flyback transformer or buck-boost inductor,
respectively. The CS1615/16 controls the dual-mode
flyback/buck-boost to satisfy the dimmer hold current
requirement in Dimmer Mode and provide power factor
correction in No-dimmer Mode. The dual-mode ensures a
minimum average input current greater than the required dimmer
hold current when behind a dimmer and shapes the line current
when not behind a dimmer to provide power factor correction. It
also ensures half line-cycle averaged constant output current.
CS1615/16 regulates output current using primary-side control,
which eliminates the need for opto-coupler feedback. The control
loop operates in peak current control mode. Demagnetization
time of the transformer is sensed by the FBAUX pin using an
auxiliary winding and is used as an input to the control loop.
V
rect
C6
D3
R6
T1
D4
To prevent excessive power dissipation on the source-switched
FET Q1, the CS1615/16 monitors voltage across FET Q1 and
current flow through FET Q1 to calculate average power
dissipation. If the calculated power exceeds the overpower
protection threshold a fault condition occurs. The IC output is
disabled and the controller attempts to restart after
approximately thirty seconds.
5.4 Voltage Clamp Circuit
To keep trailing-edge dimmer switches conducting and from
misfiring, the dimmer switch internal capacitor has to be
charged quickly around the trailing edge of the phase-cut
waveform. In addition to the dimmer compatible circuit, an
optional clamp circuit provides a high-current sinking path for
delivering the required amount of charge onto the dimmer
switch capacitor in a short amount of time.
The CS1615/16 provides active clamp circuitry on the CLAMP
pin, as shown in Figure 12.
V
rect
C6
R4
D3
R5
R6
T1
LED+
C7
LED-
D5
CS1615/16
GD
13
Q3
V
AUX
2
R
Clam p
FBSENSE 11
R7
VDD
I
CLAM P
IAC
Q
FBAUX 16
GND
12
CTRL2
9
R
CTRL2
R
S ens e
R8
C8
S1
CLAMP
GD
3
13
Q3
CS1615 /16
R
Sense
Figure 13. Flyback Model
Figure 12. CLAMP Pin Model
DS961F1
9