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APW7108 参数 Datasheet PDF下载

APW7108图片预览
型号: APW7108
PDF下载: 下载PDF文件 查看货源
内容描述: 双移动友好PWM控制器 [Dual Mobile-Friendly PWM Controller]
分类和应用: 控制器
文件页数/大小: 28 页 / 746 K
品牌: ANPEC [ ANPEC ELECTRONICS COROPRATION ]
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APW7108  
Operating Waveforms (Cont.)  
Operating at Heavy Load of 5A (CH1)  
1
2
3
4
CH1: VOUT1 (AC, 100mV/div)  
CH2: VPHASE1 (20V/div)  
CH3: IL1 (2A/div)  
CH4: VOUT2 (AC, 100mV/div)  
Time: 2ms/div  
Pin Description  
PIN  
NAME  
FUNCTION  
QFN-24  
SSOP-28  
22  
1
GND  
Signal ground for the IC.  
Output of the low-side MOSFET driver (PWM 1). Connect this pin to Gate of the low-side  
MOSFET. Swings from PGND1 or PGND to VCC.  
23  
-
2
3
LGATE1  
Power ground of the LGATE1 low-side MOSFET driver. Connect the pin to the Source of  
the low-side MOSFET.  
PGND1  
PHASE1  
UGATE1  
BOOT1  
Junction point of the high-side MOSFET Source, output filter inductor and the low-side  
MOSFET Drain. Connect this pin to the Source of the high-side MOSFET. PHASE1  
serves as the lower supply rail for the UGATE1 high-side gate driver.  
24  
1
4
5
6
Output of the high-side MOSFET driver (PWM 1). Connect this pin to Gate of the  
high-side MOSFET.  
Supply Input for the UGATE1 Gate Driver and an internal level-shift circuit. Connect to  
an external capacitor and diode to create a boosted voltage suitable to drive a logic-level  
N-channel MOSFET.  
2
Current sense pin (PWM 1). This pin is used to monitor the voltage drop across the  
Drain and Source of the low-side MOSFET for current limit. For precise current  
detection, this input can be connected to the optional current sense resistor placed in  
series with the Source of the low-side MOSFET.  
3
7
ISEN1  
Enable pin of the PWM 1 controller. The PWM 1 is enabled when EN1=1. When both  
EN1 and EN2 are low, the chip is disabled and only low leakage current is taken from  
VCC and VIN.  
4
5
6
8
9
EN1  
Selection pin for PWM 1 controller to operate in either forced PWM or automatic  
PFM/PWM mode.  
VOUT1  
VSEN1  
Output voltage feedback pin (PWM1). This pin is connected to the resistive divider that  
set the desired output voltage for PWM 1. The PGOOD, UVP, and OVP circuits detect  
this signal to report output voltage status.  
10  
Copyright ã ANPEC Electronics Corp.  
12  
www.anpec.com.tw  
Rev. A.4 - Jan., 2009  
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