APW7098
Function Description
Voltage(V)
VCC Linear Controller
VCC
VSS
The VCC linear-regulator controller is an analog gain
block with an open-drain n-channel output. It drives an
external NPN or N-channel MOSFET pass transistor with
a 1kW (typical) pull-up resistor and senses the feedback
voltage via VCC pin. The regulator uses a 1mF (minimum)
ceramic output capacitor and is designed to deliver
100mA (at 8.5V) for VCC.
V5VCC
VPOK
VFB
5VCC
POR
1.5V
0.6V
VSS_VT
5VCC Linear Regulator
5VCC is the output terminal of the internal 5V linear
regulator which regulates a 5V voltage on 5VCC by
controlling an internal bypass transistor between VCC
and 5VCC. The linear regulator powers the internal
control circuitry and is stable with a low-ESR ceramic
output capacitor. Bypass 5VCC to GND with a ceramic
capacitor of at least 1mF. Place the capacitor physically
close to the IC to provide good noise decoupling. The
linear regulator can also provide output current up to
20mA for external loads. The linear regulator with current-
limit protection can protect itself during over-load or short-
circuit conditions on 5VCC pin.
Time
Figure 1. Power Sequence
When soft-start is initiated, the internal 10mA current
source starts to charge the capacitor. When the soft-start
voltage across the soft-start capacitor reaches the en-
abled threshold about 0.8V (VSS_VT), the internal reference
starts to rise and follows the soft-start voltage with con-
verter operating at 150k/300k/400kHz PWM switching
frequency. When output voltage rises to 87.5% of the
regulation voltage, the power-ok is enabled. The soft-
start time (from the moment of enabling the IC to the
moment when VPOK goes high) can be expressed as the
following equation:
The 5VCC linear regulator stops regulating in Over-Tem-
perature Protection. When the junction temperature is
cooled by 50oC, the 5VCC linear regulator starts to regu-
late the output voltage again.
CSS ´ (VSS_VT + VREF ´ 0.875)
TSS =
ISS
where
CSS= external soft-start capacitor
VSS_VT= internal soft-start threshold voltage, is about
0.8V
5VCC Power-On-Reset (POR) and REFIN/EN (External
Reference and Enable Input)
Figure 1 shows the power sequence. The APW7098
keeps monitoring the voltage on 5VCC pin to prevent
wrong logic operations which may occur when 5VCC
voltage is not high enough for the internal control cir-
cuitry to operate. The 5VCC POR has a rising thresh-
old of 4.6V (typical) with 0.58V of hysteresis. After the
5VCC voltage exceeds its rising Power-On-Reset
(POR) voltage threshold, the IC starts a start-up pro-
cess and then ramps up the output voltage to the setting
of output voltage. The 5VCC POR signal resets the
fault latch, set by the under-voltage or over-current event,
when the signal is at a low level.
VREF= 0.6V or the voltage on the REFIN/EN pin
ISS= soft-start current=10mA
During soft-start stage, the under-voltage protection is
inhibited; however, the over-voltage and over-current pro-
tection functions are enabled. If the output capacitor has
residue voltage before start-up, both lower and upper
MOSFETs are in off-state until the internal soft-start volt-
age equals to the FB pin voltage. This will ensure the
output voltage starts from its existing voltage level.
Reference Voltage Selection and Shutdown Control
The APW7098 features a reference selection function
to use either internal 0.6V or external reference voltage.
During the beginning of soft-start, the voltage on
Copyright ã ANPEC Electronics Corp.
17
www.anpec.com.tw
Rev. A.6 - Oct., 2009
ANPEC [ ANPEC ELECTRONICS COROPRATION ]
