PRODUCT DATASHEET
AAT2601178
Total Power Solution for Portable Applications
Pin Descriptions
Pin #
Symbol Function
Similar to EN_HOLD but intended for use with the automatic tester or as a hands free enable input pin indi-
cating hands free phone operation with a headset. It is also internally pulled to GND when floating.
Enable for the system. EN_HOLD must be held high by the processor to maintain core power. It is inter-
nally pulled to GND when floating.
Enable for the system. An internal pull-up resistor keeps the pin pulled up to an internal supply to keep
the system off when there is no CHGIN input. Connect a normally-open pushbutton switch from this pin to
GND. There is an internal 300ms debounce delay circuit to filter noise.
1
EN_TEST
EN_HOLD
2
3
EN_KEY
4
5
6
7
8
ON_KEY
EN2
EN3
EN4
EN5
OUT5
OUT4
AVIN2
OUT3
OUT2
AVIN1
OUT1
AGND
CNOISE
Buffered logic output of the EN_KEY pin with a logic signal from ground to OUT1.
Enable for LDO2 (PowerAnalog or PLL). (Internally pulled low when floating)
Enable for LDO3 (TCXO). (Internally pulled low when floating)
Enable for LDO4 (TX) (Internally pulled low when floating)
Enable for LDO5 (RX) (Internally pulled low when floating)
Output for LDO5 (RX) (when shut down, pulled down with 10kΩ)
Output for LDO4 (TX) (when shut down, pulled down with 10kΩ)
Analog voltage input. Must be tied to SYSOUT on the PCB.
Output for LDO3 (TCXO)
9
10
11
12
13
14
15
16
17
Output for LDO2 (PowerAnalog)
Analog voltage input. Must be tied to SYSOUT on the PCB.
Output for LDO1 (PowerDigital)
Signal ground
Noise Bypass pin for the internal reference voltage. Connect a 0.01μF capacitor to AGND.
RESET is the open drain output of a 50ms reset timer. RESET is released after the 50ms timer times out.
RESET is active low and is held low during shutdown. RESET should be tied to a 10K or larger pullup to
OUTBUCK.
Open Drain output. Will pull low when VCHGIN > 4.5V. When this happens, depending on the status of the
USE_USB pin, the charge current will be reset to the default values (see Battery Charger and I2C Serial
Interface and Programmability section)
18
19
RESET
ADPP
20
21
22
23
LX
PGND
PVIN
Step-down Buck converter (Core) switching node. Connect an inductor between this pin and the output.
Power Ground for step-down Buck converter (Core)
Input power for step-down Buck converter (Core). Must be tied to SYSOUT.
OUTBUCK Feedback input for the step-down Buck converter (Core)
System Power output. Connect to the input voltage pins PIN, AVIN1/2 for the step-down converter and
LDOs and other external supply requirements.
24, 25
SYSOUT
26, 27
28
BAT
CHGIN
Connect to a Lithium Ion battery.
Power input from either external adapter or USB port.
When pulled high, fast charge current is set to 100mA regardless of the resistor value present on the ISET
pin. Additionally, the CHGIN-SYSOUT LDO will be disabled and the BAT-SYSOUT load switch will be enabled.
Active low enable for the battery charger (Internally pulled low when floating)
Battery Temperature Sense pin with 75μA output current. Connect the battery’s NTC resistor to this pin and
ground.
29
30
31
USE_USB
ENBAT
TS
Charge current programming input pin (Tie a 1k to GND for maximum fast charge current). Can be used to
monitor charge current.
Charger Safety Timer Pin. A 0.1μF ceramic capacitor should be connected between this pin and GND. Con-
nect directly to GND to disable the timer function.
Battery charging status pin output. Connected internally between GND and OUT1 (PowerDigital). Used to
monitor battery charge status.
32
33
34
ISET
CT
STAT
35
36
SDA
SCL
I2C serial data pin, open drain; requires a pullup resistor.
I2C serial clock pin, open drain; requires a pullup resistor.
The exposed thermal pad (EP) must be connected to board ground plane and pins 16 and 21. The ground
plane should include a large exposed copper pad under the package for thermal dissipation (see package
outline).
EP
EP
w w w . a n a l o g i c t e c h . c o m
2601.2008.01.1.0
3
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
