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AAT2550178
SystemPowerTM
Total Power Solution for Portable Applications
4. The resistance of the trace from the load return to
GND should be kept to a minimum. This minimizes
any error in DC regulation due to differences in the
potential of the internal signal ground and the power
ground.
5. For good thermal coupling, vias are required from
the pad for the QFN paddle to the ground plane. Via
diameters should be 0.3mm to 0.33mm and posi-
tioned on a 1.2mm grid. Avoid close placement to
other heat generating devices.
6. Minimize the trace impedance from the battery to
the BAT pin. The charger output is not remotely
sensed, so any drop in the output across the BAT
output trace feeding the battery will add to the error
in the EOC battery voltage. To minimize voltage
drops on the PCB, maintain an adequate high current
carrying trace width.
Printed Circuit Board Layout
Use the following guidelines to ensure a proper printed
circuit board layout.
1. Step-down converter bypass capacitors (C4 and C5
in Figure 4) must be placed as close as possible to
the step-down converter inputs.
2. The connections from the LXA and LXB pins of the
step-down converters to the output inductors should
be kept as short as possible. This is a switching
node, so minimizing the length will reduce the
potential of this noisy trace interfering with other
high impedance noise sensitive nodes.
3. The feedback trace should be separate from any
power trace and connected as closely as possible to
the load point. Sensing along a high current load
trace will degrade the DC load regulation. If external
feedback resistors are used, they should be placed
as closely as possible to the FB pins and AGND. This
prevents noise from being coupled into the high
impedance feedback node.
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ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
