AAT2505
Dual Channel, Step-Down
Converter/Linear Regulator
Given the total losses, the maximum junction tem-
perature can be derived from the θJA for the
TDFN33-12 package which is 50°C/W.
3. The feedback trace should be separate from
any power trace and connect as closely as
possible to the load point. Sensing along a
high-current load trace will degrade DC load
regulation. If external feedback resistors are
used, they should be placed as closely as pos-
sible to the FB pin. This prevents noise from
being coupled into the high impedance feed-
back node.
4. The resistance of the trace from the load return
to GND should be kept to a minimum. This will
help to minimize any error in DC regulation due
to differences in the potential of the internal sig-
nal ground and the power ground.
TJ(MAX)
=
PTOTAL
·
Θ
JA + TAMB
PCB Layout
The following guidelines should be used to ensure
a proper layout.
1. The input capacitor C2 should connect as
closely as possible to VP and PGND, as shown
in Figure 4.
5. For good thermal coupling, PCB vias are
required from the pad for the TDFN paddle to the
ground plane. The via diameter should be 0.3mm
to 0.33mm and positioned on a 1.2mm grid.
2. The output capacitor and inductor should be
connected as closely as possible. The connec-
tion of the inductor to the LX pin should also be
as short as possible.
2505.2006.06.1.1
19
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
