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AAT2505 参数 Datasheet PDF下载

AAT2505图片预览
型号: AAT2505
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道,降压型转换器/线性稳压器 [Dual Channel, Step-Down Converter/Linear Regulator]
分类和应用: 转换器稳压器
文件页数/大小: 26 页 / 845 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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AAT2505  
Dual Channel, Step-Down  
Converter/Linear Regulator  
The input capacitor RMS ripple current varies with  
the input and output voltage and will always be less  
than or equal to half of the total DC load current.  
A laboratory test set-up typically consists of two  
long wires running from the bench power supply to  
the evaluation board input voltage pins. The induc-  
tance of these wires, along with the low-ESR  
ceramic input capacitor, can create a high Q net-  
work that may affect converter performance. This  
problem often becomes apparent in the form of  
excessive ringing in the output voltage during load  
transients. Errors in the loop phase and gain  
measurements can also result.  
VOBUCK  
VIN  
· 1  
VOBUCK  
VIN  
1
2
-
=
D
· (1 - D) = 0.52 =  
for VIN = 2 x VOBUCK  
Since the inductance of a short PCB trace feeding  
the input voltage is significantly lower than the  
power leads from the bench power supply, most  
applications do not exhibit this problem.  
IOBUCK  
IRMS(MAX)  
=
2
VOBUCK  
VIN  
VOBUCK  
VIN  
·
1 -  
The term  
appears in both the  
In applications where the input power source lead  
inductance cannot be reduced to a level that does  
not affect the converter performance, a high ESR  
tantalum or aluminum electrolytic should be placed  
in parallel with the low ESR, ESL bypass ceramic.  
This dampens the high Q network and stabilizes  
the system.  
input voltage ripple and input capacitor RMS cur-  
rent equations and is a maximum when VOBUCK is  
twice VIN. This is why the input voltage ripple and  
the input capacitor RMS current ripple are a maxi-  
mum at 50% duty cycle.  
The input capacitor provides a low impedance loop  
for the edges of pulsed current drawn by the  
AAT2505. Low ESR/ESL X7R and X5R ceramic  
capacitors are ideal for this function. To minimize  
stray inductance, the capacitor should be placed as  
closely as possible to the IC. This keeps the high  
frequency content of the input current localized,  
minimizing EMI and input voltage ripple.  
Output Capacitor  
The output capacitor limits the output ripple and  
provides holdup during large load transitions. A  
4.7µF to 10µF X5R or X7R ceramic capacitor pro-  
vides sufficient bulk capacitance to stabilize the  
output during large load transitions and has the  
ESR and ESL characteristics necessary for low  
output ripple.  
The proper placement of the input capacitor (C2)  
can be seen in the evaluation board layout in  
Figure 3.  
Figure 3: AAT2505 Evaluation Board Top Side.  
Figure 4: AAT2505 Evaluation Board  
Bottom Side.  
16  
2505.2006.06.1.1  
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