AAT2513
Dual 600mA Step-Down
Converter with Synchronization
VIN
U1
C3
AAT2513
10μF
5
16
VIN1
EN1
VCC
LX1
VIN2
EN2
PS
10
11
9
1.8V
2.5V
1
L1
2.2uH
L2
7
14
3
LX2
FB2
2.2μH
4
6
2
8
FB1
R1
R3
187k
12
15
13
N/C
MODE/SYNC
N/C
118k
AGND
PGND1
R2
59.0k
C2
4.7μF
C1
4.7μF
R4
59.0k
PGND2
Figure 1: AAT2513 Typical Schematic.
Low Supply UVLO
Under-voltage lockout (UVLO) guarantees suffi-
cient VIN bias and proper operation of all internal
circuitry prior to activation.
Applications Information
Inductor Selection
The step down converter uses peak current mode
control with slope compensation to maintain stability
for duty cycles greater than 50%. The output induc-
tor value must be selected so the inductor current
down slope meets the internal slope compensation
requirements. The internal slope compensation for
the adjustable and low voltage fixed versions of the
AAT2513 is 0.6A/µsec. This equates to a slope com-
pensation that is 75% of the inductor current down
slope for a 1.8V output and 2.2µH inductor.
Fault Protection
For overload conditions, the peak inductor current
is limited. Thermal protection disables the convert-
er when the internal dissipation or ambient temper-
ature becomes excessive. The over-temperature
threshold for the junction temperature is 140°C with
15°C of hysteresis.
PWM/LL Operation
For fixed frequency, with minimum ripple under
light load conditions, the MODE/SYNC pin should
be tied to a logic high. For more efficient operation
under light load conditions the MODE/SYNC pin
should be tied to a logic low level.
0.75 ⋅ VO 0.75 ⋅ 1.8V
= 0.6
A
µsec
m =
=
L
2.2µH
0.75 ⋅ VO 0.75V ⋅ VO
µs
A
L =
=
≈
1.2
⋅ VO
A
m
0.6
µs
Clock Phase and Frequency
A logic high on the PS pin while in PWM mode
forces both converters to operate 180° out of phase
thus reducing the input ripple by roughly half. A
logic low on the PS pin synchronizes both convert-
ers in phase.
µs
= 1.2 2.5V = 3.1µH
A
In this case a standard 3.3µH value is selected.
2513.2007.04.1.1
11
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
