AWT6221R
Table 5: Electrical Specifications - PCS Band
(T
C
= +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 Ω system)
COMMENTS
PARAMETER
MIN
TYP
MAX
UNIT
P
OUT
V
MODE1
24.5
12
26.5
14.0
29.0
17.0
+29.5 dBm
+16 dBm
0 V
2.4 V
Gain
dB
dBc
dBc
%
-
-
-41
-42
-37.5
-38
+29.5 dBm
+16 dBm
0 V
2.4 V
ACLR1 at 5 MHz offset (1)
ACLR2 at 10 MHz offset
Power-Added Efficiency (1)
-
-
-55
-54
-48
-48
+29.5 dBm
+16 dBm
0 V
2.4 V
35
15
38.5
17.5
-
-
+29.5 dBm
+16 dBm
0 V
2.4 V
Quiescent Current (Icq)
Low Bias Mode
5
-
8
13
0.8
0.8
5
mA
mA
mA
mA
VMODE1 = +2.4 V
Mode Control Current
Enable Current
0.35
0.35
2.5
through VMODE pins, VMODE = +2.4 V
through VENABLE pin
-
BATT Current
-
through VBATT pin, VMODE1 = 2.4 V
V
V
BATT = +4.2 V, VCC = +4.2 V,
ENABLE = 0 V, VMODE1 = 0 V
Leakage Current
-
<1
5
µA
-
-
-137
140
-135
-138
P
P
OUT = +29.5 dBm, VMODE1 = 0 V
OUT = +16 dBm, VMODE1 = 2.4 V
Noise in Receive Band (2)
dBm/Hz
Harmonics
2fo
3fo, 4fo
-
-
-42
-46
-35
-35
dBc
Input Impedance
-
-
2:1
VSWR
P
OUT < +29.5 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating
conditions
Spurious Output Level
(all spurious outputs)
-
-
-70
dBc
Load mismatch stress with no
permanent degradation or failure
8:1
-
-
VSWR Applies over full operating range
Notes:
(1) ACLR and Efficiency measured at 1880 MHz.
(2) 1930 MHz to 1990 MHz.
Data Sheet - Rev 2.4
5
08/2010