October 2000
AS29LV800
®
AC test conditions
+3.0V
1N3064
or equivalent
2.7KΩ
Device under test
6.2KΩ
CL*
1N3064
or equivalent
VSS
VSS
VSS
Test specifications
Test Condition
80
30
90, 120
Unit
1 TTL gate
100
Output Load
Output Load Capacitance C (including jig capacitance)
pF
ns
V
L
5
Input Rise and Fall Times
Input Pulse Levels
0.0-3.0
1.5
Input timing measurement reference levels
Output timing measurement reference levels
V
1.5
V
Erase and programming performance
Limits
Parameter
Min
Typical
Max
Unit
sec
Sector erase and verify-1 time (excludes 00h programming
prior to erase)
-
1.0
15
Byte
-
-
-
-
10
15
300
360
27
-
µs
µs
Programming time
Word
Chip programming time
7.2
sec
*
Erase/program cycles
100,000
cycles
* Erase/program cycle test is not verified on each shipped unit.
Latchup tolerance
Parameter
Min
-1.0
-0.5
-100
Max
Unit
+12.0
V
Input voltage with respect to V on A9, OE, and RESET pin
SS
V
Input voltage with respect to V on all DQ, address, and control pins
SS
VCC+0.5
+100
Current
mA
Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time.
Recommended operating conditions
Parameter
Symbol
Min
+2.7
0
Max
+3.6
0
Unit
V
V
V
V
V
CC
SS
IH
IL
Supply voltage
V
1.9
V
+ 0.3
V
CC
Input voltage
–0.5
0.8
V
22
ALLIANCE SEMICONDUCTOR
DID 11-40002-A. 10/19/00
ANADIGICS [ ANADIGICS, INC ]
