ARA2004
GaAs IC
ATTOUT (+)
ATTIN (+)
A1OUT (+)
A1IN (+)
A2IN (+)
A2OUT (+)
32 dB
16 dB
8 dB
4 dB
2 dB
1 dB
ISET1
ISET2
EFET
EFET
Vg1
Vg2
A1IN (-)
A2OUT (-)
A1OUT (-)
ATTIN (-)
A2IN (-)
ATTOUT (-)
32 dB
P5
16 dB
P4
8 dB
P3
4 dB
P2
2 dB
P1
1 dB
P0
Buffer
Clock
Data
8
8-Bit Shift
Register/
Address
Control Latch
Enable
CMOS IC (Serial to Parallel Interface)
Figure 2: Functional Block Diagram
1
GND
GND
N/C
28
VATTN
2
3
27
26
25
24
23
22
21
20
19
ATTIN (+)
A1OUT (+)
A1IN (+)
Vg1
ATTOUT (+)
A2IN (+)
A2OUT (+)
Vg2
4
5
6
ISET1
ISET2
7
A1IN (-)
A1OUT (-)
ATTIN (-)
VCMOS
CLK
A2OUT (-)
A2IN (-)
ATTOUT (-)
GNDCMOS
N/C
8
9
10
11
12
13
14
18
17
16
15
DAT
N/C
En
N/C
Figure 3: Pin Out
Data Sheet - Rev 2.1
07/2005
2
ANADIGICS [ ANADIGICS, INC ]
