ARA2000
LOGIC PROGRAMMING
Programming Instructions
The programming word is set through a 16 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last.
The enable line must be low for the duration of the
data entry, then set high to latch the shift register.
The rising edge of the clock pulse shifts each data
value into the register.
Table 6: Programming Word
DATA BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Value
P7 P6 P5 P4 P3 P2 P1 P0
0
0
0
1
C1 C0
1
1
Table 7: Data Description
FUNCTION
Table 8: Device Address
LOGIC LEVEL INPUT TO
ADDRESS DEVICE
VALUE
(1 = on, 0 = bypass)
P7
N/A
C1
C0
Pin 16 (C1)
Pin 15 (C0)
P6
P5
P4
P3
P2
P1
P0
N/A
0
1
0
1
0
0
1
1
0
1
0
1
0
0
1
1
32 dB Attenuator Bit
16 dB Attenuator Bit
8 dB Attenuator Bit
4 dB Attenuator Bit
2 dB Attenuator Bit
1 dB Attenuator Bit
The device is selected when the logic inputs at pins
16 and 15 match the values of data bits C1 and C0,
respectively.
DATA
D15: MSB
D14
D8
D7
D1
D0: LSB
CLOCK
ENABLE
OR
ENABLE
Figure 17: Serial Data Input Timing
Data Sheet - Rev 2.2
06/2004
12
ANADIGICS [ ANADIGICS, INC ]
