AS1520/AS1521
Data Sheet - Application Information
Layout Considerations
The AS1520/AS1521 require proper layout and design procedures for optimum performance.
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Use printed circuit boards; wirewrap boards should not be used.
Analog and digital traces should be separate and should not run parallel to each other (especially clock traces).
Digital traces should not run beneath the AS1520/AS1521.
Use a single-point analog ground at GND, separate from the digital ground (see Figure 36). Connect all other ana-
log grounds and DGND to this star ground point for further noise reduction. No other digital system ground should
be connected to this single-point analog ground. The ground return to the power supply for this ground should be
low impedance and as short as possible for noise-free operation.
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High-frequency noise in the VDD power supply may affect the AS1520/AS1521 high-speed comparator. Bypass
this supply to the single-point analog ground with 0.1µF and 4.7µF bypass capacitors. Bypass capacitors should
be as close to the device as possible for optimum power supply noise-rejection. If the power supply is very noisy, a
10Ω resistor can be connected as a low-pass filter to attenuate supply noise (see Figure 36).
Figure 36. Recommended GND Design
GND
VDD2
DGND
VDD
Digital
Circuitry
19
VDD2
9
+
+
Power
Supplies
COM
13
AS1520/
AS1521
GND
VDD1
GND
20
VDD1
10
10Ω
(Optional)
VDD3
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