AS1374
Datasheet - Application Information
9.5.3 Setting Accuracy
Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage
of the error amplifier. When the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification.
When the regulator has a SET terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external resistor network
must be incorporated into the final accuracy calculation. Generally:
R1R1
R2R2
---------------------
VOUT = VSETVSET 1 +
(EQ 12)
The reference tolerance is given both at 25°C and over the full operating temperature range.
9.5.4 Total Accuracy
Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally:
Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation %
(EQ 13)
9.6 Explanation of Dynamic Specifications
9.6.1 Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low
quiescent current conditions. Generally:
VOUT
----------------
PSRR = 20Log
dB using lower case to indicate AC values
(EQ 14)
VIN
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally. The AS1374 is
designed to deliver low noise and high PSRR, with low quiescent currents in battery-powered systems. The power-supply rejection is 85dB at
1kHz and 50dB at 100kHz. When operating from sources other than batteries, improved supply-noise rejection and transient response are
achieved by increasing the values of the input and output capacitors. Additional passive LC filtering at the input can provide enhanced rejection
at high frequencies.
9.6.2 Output Capacitor ESR
The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usually used to
cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values may actually cause
instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stability is usually shown
either by a plot of stable ESR versus load current, or a maximum value in the datasheet.
Some ceramic capacitors exhibit large capacitance and ESR variations with variations in temperature. Z5U and Y5V capacitors may be required
to ensure stability at temperatures below TAMB = -10°C. With X7R or X5R capacitors, a 1µF capacitor should be sufficient at all operating
temperatures.
Larger output capacitor values (10µF) help to reduce noise and improve load transient-response, stability and power-supply rejection.
9.6.3 Input Capacitor
An input capacitor at VIN is required for stability. It is recommended that a 1.0µF capacitor be connected between the AS1369 power supply
input pin VIN and ground (capacitance value may be increased without limit subject to ESR limits). This capacitor must be located at a distance
of not more than 1cm from the VIN pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used
at the input.
9.6.4 Noise
The regulator output is a DC voltage with noise superimposed on the output. The noise comes from three sources; the reference, the error
amplifier input stage, and the output voltage setting resistors. Noise is a random fluctuation and if not minimized in some applications, will
produce system problems.
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