AS1369
Data Sheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Input Supply Voltage
Shutdown Input Voltage
Output Voltage
I
OUT
Input/Output Voltage
Power Dissipation
1
Min
-0.3
-0.3
-0.3
Max
+7
+7
+7
Units
V
V
V
Comments
Short-circuit protected.
-0.3
+7
360
-40
-65
+125
+150
2
500
-100
+100
V
mW
ºC
ºC
kV
V
mA
HBM MIL-Std. 883E 3015.7
methods
CDM JESD22-C101C
methods
JEDEC 78
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/
JEDEC J-STD-020C “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State
Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
Internally limited. Mounted on PCB.
2
Operating Junction Temperature
Storage Temperature Range
ESD
Latch-Up
Package Body Temperature
+260
ºC
1. The output PNP structure contains a diode between pins V
IN
and V
OUT
that is normally reverse-biased. revers-
ing the polarity of pins V
IN
and V
OUT
will activate this diode.
2. The maximum allowable power dissipation is a function of the maximum junction temperature (T
J(MAX
), the
junction-to-ambient thermal resistance (Θ
JA
), and the ambient temperature (T
AMB
). The maximum allowable
power dissipation at any ambient temperature is calculated as:
P
(MAX)
= (T
J(MAX)
- (T
AMB
))/
Θ
JA
Where:
The value of
Θ
JA
for the WLP package is 345°C/W.
Note:
Exceeding the maximum allowable dissipation will cause excessive device temperature and the
regulator will go into thermal shutdown.
(EQ 1)
The AS1369 uses an internal protective structure against light influence. However, exposing the WLP package to
direct light could cause device malfunction.
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