AS3525-A/-B C22O22
Data Sheet, Confidential
7.4.4
Charge-Pump Step-Down Converter
7.4.4.1 General
This converter will be used to supply the core voltage for a microprocessor.
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Input Voltage CPVDD
Output Voltage 1.05 to 1.2 V
Voltage setting via CVDDp<1:0> bits in 4 steps
regulated 2:1 charge pump with pulse skipping
scaleable switches according to BVDD
Bypass LDO for higher currents or lower battery voltages respectively
Driver strength: 50mA / 200mA with bypass LDO
Figure 48 CP Block Diagram
7.4.4.2 Mode Description
Three different functional parts generate core supply voltage CVDD. The switching between the modes is generally done automatically, but can
also be manually overwritten by register settings.
Please observe that the charge pump block starts up in Mode 2(IOVDD length regulator mode) to avoid a current limitation and has to be switched
to automatic operation by register settings.
Direct length regulation from VBAT
Mode1=true IF ((1.2V+Vmargin1) < VBAT_1V < (VTH1)) && (NoUSB)
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Vmargin1=50mV/150mV (100mV hysteretic)
VTH1=1.7V/1.8V (100mV hysteretic)
VBAT LDO is used when [1.8V > VBAT_1V > 1.25V]
VBAT LDO is not used when there is high supply present from USB even when VBAT is in range.
Direct length regulation from IOVDD
Mode2=true IF ((Not Mode1) && (IOVDD/2 < (1.2+Vmargin2)))
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Vmargin2=200mV/300mV (100mV hysteretic)
IOVDD LDO is used when VBAT LDO Mode1 is not entered and
IOVDD is not high enough to do 2:1 charge-pump regulation.
Charge-Pump IOVDD division by 2 active plus length regulation
Mode3=true IF ((Not Mode1) && (Not Mode2))
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