LP621024D Series
AC Test Conditions
Input Pulse Levels
0V to 3.0V
5 ns
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
1.5V
See Figures 1 and 2
+5V
+5V
1800
W
1800W
I/O
I/O
30pF*
5pF*
990
W
990W
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR1
2.0
5.5
V
CE1 ³ VCC - 0.2V
VDR2
VCC for Data Retention
2.0
5.5
V
CE2 £ 0.2V
CE1 ³ VCC - 0.2V or
CE1 £ 0.2V
VCC = 2.0V,
CE1 ³ VCC - 0.2V
CE2 ³ VCC - 0.2V
VIN ³ 0V
ICCDR1
LL-Version
LL-Version
-
-
10**
10**
mA
mA
Data Retention Current
VCC = 2.0V
CE2 £ 0.2V
VIN ³ 0V
ICCDR2
tCDR
tR
Chip Disable to Data Retention Time
Operation Recovery Time
0
5
-
-
ns
See Retention Waveform
ms
** LP621024D-55LL/70LL
ICCDR: Max. 2mA at TA = 0°C to + 40 °C
(August, 2001, Version 1.0)
10
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
