LP61L1024
Truth Table
Mode
CE2
I/O Operation
Supply Current
CE1
H
OE
X
WE
X
X
L
High Z
High Z
High Z
DOUT
ISB, ISB1
ISB, ISB2
ICC1
Standby
X
X
X
Output Disable
Read
L
H
H
H
H
L
H
L
H
ICC1
Write
L
X
L
DIN
ICC1
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
CIN*
Parameter
Min.
Max.
Unit
pF
Conditions
VIN = 0V
Input Capacitance
8
CI/O*
Input/Output Capacitance
10
pF
VI/O = 0V
* These parameters are sampled and not 100% tested.
AC Characteristics (TA = 0°C to +70°C, VCC = 3.3V + 10, GND = 0V)
LP61L1024-12
LP61L1024-15
Symbol
Parameter
Unit
Min.
Max.
Min.
Max.
Read Cycle
tRC
tAA
Read Cycle Time
Address Access Time
12
-
-
15
-
-
ns
ns
ns
12
12
15
15
tACE1
Chip Enable Access Time
-
-
CE1
CE2
tACE2
tOE
-
-
12
7
-
-
15
9
ns
ns
ns
Output Enable to Output Valid
Chip Enable to Output in Low Z
tCLZ1
3
-
5
-
CE1
CE2
tCLZ2
tOLZ
3
2
-
-
-
5
2
-
-
-
ns
ns
ns
Output Enable to Output in Low Z
Chip Disable to Output in High Z
tCHZ1
7
10
CE1
CE2
tCHZ2
tOHZ
tOH
-
7
7
-
-
10
9
ns
ns
ns
Output Disable to Output in High Z
Output Hold from Address Change
2
3
2
5
-
(August, 2002, Version 2.1)
4
AMIC Technology, Inc.