LP61L1024
128K X 8 BIT 3.3V HIGH SPEED LOW VCC CMOS SRAM
Features
General Description
n Single +3.3V power supply
The LP61L1024 is a low operating current 1,048,576-bit
n Access times: 12/15 ns (max.)
n Current: Operating: 170mA (max.)
static random access memory organized as 131,072 words
by 8 bits and operates on a single 3.3V power supply.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable inputs are provided for POWER-DOWN
and device enable and an output enable input is included
for easy interfacing.
Standby:
10mA (max.)
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL compatible
n Common I/O using three-state output
n Output enable and two chip enable inputs for easy
application
n Data retention voltage: 2.0V (min.)
n Available in 32-pin SOJ 300 mil, 32-pin TSOP and 32-
pin TSSOP and 36-pin CSP packages
Data retention is guaranteed at a power supply voltage as
low as 2.0V.
Product Family
Package
Type
Power Dissipation
Operating
Temperature
VCC
Range
Product
Family
Speed
Data Retention
Standby
Operating
(ICC1, Typ.)
(ICCDR, Typ.)
(ISB1, Typ.)
32L SOJ
32L TSOP
32L TSSOP
36B mBGA
LP61L1024
3V ~ 3.6V
12/15 ns
0.4mA
0.5mA
130mA
0°C ~ 70°C
1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested.
2. Data retention current VCC = 2.0V.
(August, 2002, Version 2.1)
1
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
