A62S6308 Series
AC Test Conditions
Input Pulse Levels
0.4V to 2.4V
5 ns
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
1.5V
See Figures 1 and 2
TTL
TTL
CL
CL
30pF
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to + 70°C or -25°C to 85°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR1
2.0
3.6
V
CE1 ³ VCC - 0.2V
VCC for Data Retention
CE2 £ 0.2V
VDR2
2.0
3.6
V
CE1 ³ VCC - 0.2V or
CE1 £ 0.2V
S-Version
SI-Version
S-Version
SI-Version
-
-
-
-
10*
20**
10*
VCC = 2.0V
ICCDR1
mA
CE1 ³ VCC - 0.2V
CE2 ³ VCC - 0.2V
VIN ³ 0V
Data Retention Current
VCC = 2.0V
CE2 £ 0.2V
ICCDR2
mA
VIN ³ 0V
20**
tCDR
tR
Chip Disable to Data Retention Time
Operation Recovery Time
0
-
-
ns
ns
tRC
See Retention Waveform
VCC Rise Time from Data Retention Voltage
to Operating Voltage
tVR
5
-
ms
** A62S6308-70S/10S
A62S6308-70SI/10SI
ICCDR: Max. 3mA at TA = 0°C + 40°C
ICCDR: Max. 3mA at TA = 0°C + 40°C
*
(October, 1998, Version 2.0)
10
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
